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*** Device Tree ***
{
    "pcie_cfg_base" : "0xe0000000",
    "pci_devices" :
    {
        "0x10000" : "IGPU@2",
        "0x0" : "MCHC@0",
        "0x18000" : "HDAU@3",
        "0xa0000" : "XHC1@14",
        "0xa8000" : "SDMA@15",
        "0xac000" : "SPI1@15,4",
        "0xb0000" : "pci8086,9cba@16",
        "0xd8000" : "HDEF@1B",
        "0xe1000" : "RP02@1C,1",
        "0xe2000" : "RP03@1C,2",
        "0xe4000" : "RP05@1C,4",
        "0xe0000" : "RP01@1C",
        "0xe5000" : "RP06@1C,5",
        "0xfb000" : "SBUS@1F,3",
        "0xf8000" : "LPCB@1F",
        "0xfe000" : "pci8086,9ca4@1F,6",
        "0x200000" : "RP02@1C,1/IOPP/CMRA@0",
        "0x300000" : "RP03@1C,2/IOPP/ARPT@0",
        "0x400000" : "RP06@1C,5/IOPP/SSD0@0",
        "0x500000" : "RP05@1C,4/IOPP/UPSB@0",
        "0x600000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0",
        "0x618000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB1@3",
        "0x620000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB2@4",
        "0x700000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0",
        "0x628000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB3@5",
        "0x630000" : "RP05@1C,4/IOPP/UPSB@0/IOPP/DSB4@6"
    },
    "device_mmio" :
    {
        "PCI0@0" :
        [
            { "a" : "0xcf8", "s" : "0x8" }
        ],
        "PCI0@0/AppleACPIPCI/IGPU@2" :
        [
            { "a" : "0x7fa0000000", "s" : "0x1000000" },
            { "a" : "0x7f90000000", "s" : "0x10000000" }
        ],
        "PCI0@0/AppleACPIPCI/HDAU@3" :
        [
            { "a" : "0x7fa1014000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/XHC1@14" :
        [
            { "a" : "0x7fa1000000", "s" : "0x10000" }
        ],
        "PCI0@0/AppleACPIPCI/SDMA@15" :
        [
            { "a" : "0xc181a000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/SPI1@15,4" :
        [
            { "a" : "0xc1819000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/pci8086,9cba@16" :
        [
            { "a" : "0x7fa1019100", "s" : "0x20" }
        ],
        "PCI0@0/AppleACPIPCI/HDEF@1B" :
        [
            { "a" : "0x7fa1010000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/RP02@1C,1/IOPP/CMRA@0" :
        [
            { "a" : "0xc1700000", "s" : "0x10000" },
            { "a" : "0x7f80000000", "s" : "0x10000000" },
            { "a" : "0xc1600000", "s" : "0x100000" }
        ],
        "PCI0@0/AppleACPIPCI/RP03@1C,2/IOPP/ARPT@0" :
        [
            { "a" : "0xc1400000", "s" : "0x8000" },
            { "a" : "0xc1000000", "s" : "0x400000" }
        ],
        "PCI0@0/AppleACPIPCI/RP05@1C,4/IOPP/UPSB@0/IOPP/DSB0@0/IOPP/NHI0@0" :
        [
            { "a" : "0xc1900000", "s" : "0x40000" },
            { "a" : "0xc1940000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/RP06@1C,5/IOPP/SSD0@0" :
        [
            { "a" : "0xc1500000", "s" : "0x2000" }
        ],
        "PCI0@0/AppleACPIPCI/SBUS@1F,3" :
        [
            { "a" : "0x7fa1019000", "s" : "0x100" }
        ],
        "PCI0@0/AppleACPIPCI/pci8086,9ca4@1F,6" :
        [
            { "a" : "0x7fa1018000", "s" : "0x1000" }
        ],
        "DMAC" :
        [
            { "a" : "0x0", "s" : "0x20" },
            { "a" : "0x81", "s" : "0x11" },
            { "a" : "0x93", "s" : "0xd" },
            { "a" : "0xc0", "s" : "0x20" }
        ],
        "FWHD" :
        [
            { "a" : "0xff000000", "s" : "0x1000000" }
        ],
        "HPET" :
        [
            { "a" : "0xfed00000", "s" : "0x4000" }
        ],
        "IPIC" :
        [
            { "a" : "0x20", "s" : "0x2" },
            { "a" : "0x24", "s" : "0x2" },
            { "a" : "0x28", "s" : "0x2" },
            { "a" : "0x2c", "s" : "0x2" },
            { "a" : "0x30", "s" : "0x2" },
            { "a" : "0x34", "s" : "0x2" },
            { "a" : "0x38", "s" : "0x2" },
            { "a" : "0x3c", "s" : "0x2" },
            { "a" : "0xa0", "s" : "0x2" },
            { "a" : "0xa4", "s" : "0x2" },
            { "a" : "0xa8", "s" : "0x2" },
            { "a" : "0xac", "s" : "0x2" },
            { "a" : "0xb0", "s" : "0x2" },
            { "a" : "0xb4", "s" : "0x2" },
            { "a" : "0xb8", "s" : "0x2" },
            { "a" : "0xbc", "s" : "0x2" },
            { "a" : "0x4d0", "s" : "0x2" }
        ],
        "MATH" :
        [
            { "a" : "0xf0", "s" : "0x1" }
        ],
        "LDRC" :
        [
            { "a" : "0x2e", "s" : "0x2" },
            { "a" : "0x4e", "s" : "0x2" },
            { "a" : "0x61", "s" : "0x1" },
            { "a" : "0x63", "s" : "0x1" },
            { "a" : "0x65", "s" : "0x1" },
            { "a" : "0x67", "s" : "0x1" },
            { "a" : "0x80", "s" : "0x1" },
            { "a" : "0x92", "s" : "0x1" },
            { "a" : "0xb2", "s" : "0x2" },
            { "a" : "0xffff", "s" : "0x1" },
            { "a" : "0x1800", "s" : "0x80" },
            { "a" : "0x800", "s" : "0x80" }
        ],
        "RTC" :
        [
            { "a" : "0x70", "s" : "0x8" }
        ],
        "TIMR" :
        [
            { "a" : "0x40", "s" : "0x4" },
            { "a" : "0x50", "s" : "0x4" }
        ],
        "SMC" :
        [
            { "a" : "0x300", "s" : "0x20" },
            { "a" : "0xfef00000", "s" : "0x10000" }
        ],
        "EC" :
        [
            { "a" : "0x62", "s" : "0x1" },
            { "a" : "0x66", "s" : "0x1" }
        ],
        "PDRC" :
        [
            { "a" : "0xfed1c000", "s" : "0x4000" },
            { "a" : "0xfed10000", "s" : "0x8000" },
            { "a" : "0xfed18000", "s" : "0x1000" },
            { "a" : "0xfed19000", "s" : "0x1000" },
            { "a" : "0xe0000000", "s" : "0x10000000" },
            { "a" : "0xfed20000", "s" : "0x20000" },
            { "a" : "0xfed90000", "s" : "0x4000" },
            { "a" : "0xfed45000", "s" : "0x4b000" },
            { "a" : "0xff000000", "s" : "0x1000000" },
            { "a" : "0xfee00000", "s" : "0x100000" }
        ],
        "MEM2" :
        [
            { "a" : "0x20000000", "s" : "0x200000" },
            { "a" : "0x40000000", "s" : "0x200000" }
        ]
    }
}