*** MCA Error Report ***
CPU W < ine 7 ]<k Ar7  Mectu'^ Trror DX^p (C Z* InteG
%  Xeog
%  CPU TXV1650 d. @ 3.W v z, C Z I: 0x7 fV4)
7x-^: 0 W!  IA32w[9 7_ST HZ:=0xFW(  0000  F 136
'   A32_W9 v_CTLW   
    8&_MC1wv HDR=0  fhFFFC V!  IA3'v[917_M 9:X0x14    3040    86
7x-^: 0 W!  IA32w[9 8_ST HZ:=0xBW(  0000  F 136
'   A32_W9  _CTLW   
    8&_MC1 w HDR=0  fhFFF8 V!  IA3'v[918_M 9:X0x18    7040    86
7x-^: 0 W!  IA32w[9 9_ST HZ:=0xBW(  0000  F 136
'   A32_W9  _CTLW   
    8&_MC1 w HDR=0  fhFFF0 V!  IA3'v[919_M 9:X0x14    3040    86
7x-^: 0 W!  IA32w[9(0_ST HZ:=0xBW(  0000  F 136
'   A32_W9( _CTLW   
    8&_MC2 v HDR=0  fhFFF4 V!  IA3'v[920_M 9:X0x18    3040    86
7x-^: 0 W!  IA32w[9(1_ST HZ:=0xBW(  0000  F 136
'   A32_W9( _CTLW   
    8&_MC2 v HDR=0  fhFFE4 V!  IA3'v[921_M 9:X0x14    3040    86
7x-^: 0 W!  IA32w[9(2_ST HZ:=0xBW(  0000  F 136
'   A32_W9(&_CTLW   
    8&_MC2'v HDR=0  fhFFEC V!  IA3'v[922_M 9:X0x18    3040    86
 

*** Device Tree ***
{
    "pcie_cfg_base" : "0xe0000000",
    "pci_devices" :
    {
        "0x0" : "DMI2@0",
        "0x8000" : "PEG0@1",
        "0x10000" : "GFXA@2",
        "0x18000" : "GFXB@3",
        "0x20000" : "CBD0@4",
        "0x21000" : "CBD1@4,1",
        "0x22000" : "CBD2@4,2",
        "0x23000" : "CBD3@4,3",
        "0x24000" : "CBD4@4,4",
        "0x25000" : "CBD5@4,5",
        "0x26000" : "CBD6@4,6",
        "0x27000" : "CBD7@4,7",
        "0x28000" : "IOC0@5",
        "0x29000" : "IOC1@5,1",
        "0x2c000" : "IOC4@5,4",
        "0x2a000" : "IOC2@5,2",
        "0x88000" : "VMS0@11",
        "0xb0000" : "HECI@16",
        "0xd8000" : "HDEF@1B",
        "0xe0000" : "RP01@1C",
        "0xe1000" : "RP02@1C,1",
        "0xe2000" : "RP03@1C,2",
        "0xe4000" : "RP05@1C,4",
        "0xe8000" : "EHC1@1D",
        "0xf0000" : "IP2P@1E",
        "0xf8000" : "LPCB@1F",
        "0xfa000" : "pci8086,1d02@1F,2",
        "0xfb000" : "SBUS@1F,3",
        "0x1000000" : "PEG0@1/IOPP/BR00@0",
        "0x600000" : "GFXB@3/IOPP/GFX2@0",
        "0x601000" : "GFXB@3/IOPP/HDAU@0,1",
        "0x200000" : "GFXA@2/IOPP/GFX1@0",
        "0x201000" : "GFXA@2/IOPP/HDAD@0,1",
        "0xe00000" : "RP05@1C,4/IOPP/SSD0@0",
        "0xd00000" : "RP03@1C,2/IOPP/ARPT@0",
        "0xc00000" : "RP02@1C,1/IOPP/ETH0@0",
        "0x1108000" : "PEG0@1/IOPP/BR00@0/IOPP/BR13@1",
        "0x1110000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2",
        "0x1140000" : "PEG0@1/IOPP/BR00@0/IOPP/BR14@8",
        "0x1148000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9",
        "0x1150000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A",
        "0xb00000" : "RP01@1C/IOPP/ETH1@0",
        "0xb100000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0",
        "0x1400000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0",
        "0x6300000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0",
        "0x1300000" : "PEG0@1/IOPP/BR00@0/IOPP/BR13@1/IOPP/XHC1@0",
        "0xb200000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB0@0",
        "0xb218000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3",
        "0xb220000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB2@4",
        "0xb228000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB3@5",
        "0xb230000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB4@6",
        "0xb300000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB0@0/IOPP/NHI1@0",
        "0x6400000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB0@0",
        "0x6418000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB1@3",
        "0x6420000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB2@4",
        "0x6428000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB3@5",
        "0x6430000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB4@6",
        "0x1500000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB0@0",
        "0x1518000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB1@3",
        "0x1520000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB2@4",
        "0x1528000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB3@5",
        "0x1530000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB4@6",
        "0x1600000" : "PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB0@0/IOPP/NHI0@0",
        "0x6500000" : "PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB0@0/IOPP/NHI2@0",
        "0xe700000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0",
        "0xe808000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@1",
        "0xe810000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@2",
        "0xe818000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@3",
        "0xe820000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@4",
        "0xeb00000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@1/IOPP/pci1b21,625@0",
        "0xea00000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@2/IOPP/pci1b21,1142@0",
        "0xe900000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@3/IOPP/pci1b21,1142@0",
        "0xec00000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@4/IOPP/pci-bridge@0",
        "0xed08000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@4/IOPP/pci-bridge@0/IOPP/pci-bridge@1",
        "0xee00000" : "PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@4/IOPP/pci-bridge@0/IOPP/pci-bridge@1/IOPP/pci1b73,1100@0"
    },
    "device_mmio" :
    {
        "PCI0@0" :
        [
            { "a" : "0xcf8", "s" : "0x8" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0" :
        [
            { "a" : "0xa0900000", "s" : "0x40000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR13@1/IOPP/XHC1@0" :
        [
            { "a" : "0xa0a00000", "s" : "0x10000" },
            { "a" : "0xa0a10000", "s" : "0x1000" },
            { "a" : "0xa0a11000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB0@0/IOPP/NHI1@0" :
        [
            { "a" : "0xcab00000", "s" : "0x40000" },
            { "a" : "0xcab40000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@1/IOPP/pci1b21,625@0" :
        [
            { "a" : "0xcae00000", "s" : "0x2000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@2/IOPP/pci1b21,1142@0" :
        [
            { "a" : "0xcad00000", "s" : "0x8000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@3/IOPP/pci1b21,1142@0" :
        [
            { "a" : "0xcac00000", "s" : "0x8000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR11@2/IOPP/UFS1@0/IOPP/DSB1@3/IOPP/UPS0@0/IOPP/pci-bridge@4/IOPP/pci-bridge@0/IOPP/pci-bridge@1/IOPP/pci1b73,1100@0" :
        [
            { "a" : "0xcaf00000", "s" : "0x10000" },
            { "a" : "0xcaf11000", "s" : "0x1000" },
            { "a" : "0xcaf10000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR12@9/IOPP/UFS2@0/IOPP/DSB0@0/IOPP/NHI2@0" :
        [
            { "a" : "0xb5b00000", "s" : "0x40000" },
            { "a" : "0xb5b40000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/PEG0@1/IOPP/BR00@0/IOPP/BR10@A/IOPP/UFS0@0/IOPP/DSB0@0/IOPP/NHI0@0" :
        [
            { "a" : "0xa0b00000", "s" : "0x40000" },
            { "a" : "0xa0b40000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/GFXA@2/IOPP/GFX1@0" :
        [
            { "a" : "0xfff90000000", "s" : "0x10000000" },
            { "a" : "0xa0700000", "s" : "0x40000" },
            { "a" : "0xa0740000", "s" : "0x20000" }
        ],
        "PCI0@0/AppleACPIPCI/GFXA@2/IOPP/HDAD@0,1" :
        [
            { "a" : "0xa0760000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/GFXB@3/IOPP/GFX2@0" :
        [
            { "a" : "0xfff80000000", "s" : "0x10000000" },
            { "a" : "0xa0600000", "s" : "0x40000" },
            { "a" : "0xa0640000", "s" : "0x20000" }
        ],
        "PCI0@0/AppleACPIPCI/GFXB@3/IOPP/HDAU@0,1" :
        [
            { "a" : "0xa0660000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD0@4" :
        [
            { "a" : "0xfffa0220000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD1@4,1" :
        [
            { "a" : "0xfffa021c000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD2@4,2" :
        [
            { "a" : "0xfffa0218000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD3@4,3" :
        [
            { "a" : "0xfffa0214000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD4@4,4" :
        [
            { "a" : "0xfffa0210000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD5@4,5" :
        [
            { "a" : "0xfffa020c000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD6@4,6" :
        [
            { "a" : "0xfffa0208000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/CBD7@4,7" :
        [
            { "a" : "0xfffa0204000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/IOC4@5,4" :
        [
            { "a" : "0xa0826000", "s" : "0x1000" }
        ],
        "PCI0@0/AppleACPIPCI/HECI@16" :
        [
            { "a" : "0xfffa0224100", "s" : "0x10" }
        ],
        "PCI0@0/AppleACPIPCI/HDEF@1B" :
        [
            { "a" : "0xfffa0200000", "s" : "0x4000" }
        ],
        "PCI0@0/AppleACPIPCI/RP01@1C/IOPP/ETH1@0" :
        [
            { "a" : "0xfffa0100000", "s" : "0x10000" },
            { "a" : "0xfffa0110000", "s" : "0x10000" }
        ],
        "PCI0@0/AppleACPIPCI/RP02@1C,1/IOPP/ETH0@0" :
        [
            { "a" : "0xfffa0000000", "s" : "0x10000" },
            { "a" : "0xfffa0010000", "s" : "0x10000" }
        ],
        "PCI0@0/AppleACPIPCI/RP03@1C,2/IOPP/ARPT@0" :
        [
            { "a" : "0xa0200000", "s" : "0x8000" },
            { "a" : "0xa0000000", "s" : "0x200000" }
        ],
        "PCI0@0/AppleACPIPCI/RP05@1C,4/IOPP/SSD0@0" :
        [
            { "a" : "0xa0500000", "s" : "0x2000" }
        ],
        "PCI0@0/AppleACPIPCI/EHC1@1D" :
        [
            { "a" : "0xa0827800", "s" : "0x400" }
        ],
        "PCI0@0/AppleACPIPCI/pci8086,1d02@1F,2" :
        [
            { "a" : "0xa0827000", "s" : "0x800" }
        ],
        "PCI0@0/AppleACPIPCI/SBUS@1F,3" :
        [
            { "a" : "0xfffa0224000", "s" : "0x100" }
        ],
        "XRES" :
        [
            { "a" : "0xdfffa000", "s" : "0x1000" },
            { "a" : "0xdfff8000", "s" : "0x1000" }
        ],
        "APIC" :
        [
            { "a" : "0xfec00000", "s" : "0x100000" }
        ],
        "DMAC" :
        [
            { "a" : "0x0", "s" : "0x20" },
            { "a" : "0x81", "s" : "0x11" },
            { "a" : "0x93", "s" : "0xd" },
            { "a" : "0xc0", "s" : "0x20" }
        ],
        "FWHD" :
        [
            { "a" : "0xff000000", "s" : "0x1000000" }
        ],
        "HPET" :
        [
            { "a" : "0xfed00000", "s" : "0x400" }
        ],
        "IPIC" :
        [
            { "a" : "0x20", "s" : "0x2" },
            { "a" : "0x24", "s" : "0x2" },
            { "a" : "0x28", "s" : "0x2" },
            { "a" : "0x2c", "s" : "0x2" },
            { "a" : "0x30", "s" : "0x2" },
            { "a" : "0x34", "s" : "0x2" },
            { "a" : "0x38", "s" : "0x2" },
            { "a" : "0x3c", "s" : "0x2" },
            { "a" : "0xa0", "s" : "0x2" },
            { "a" : "0xa4", "s" : "0x2" },
            { "a" : "0xa8", "s" : "0x2" },
            { "a" : "0xac", "s" : "0x2" },
            { "a" : "0xb0", "s" : "0x2" },
            { "a" : "0xb4", "s" : "0x2" },
            { "a" : "0xb8", "s" : "0x2" },
            { "a" : "0xbc", "s" : "0x2" },
            { "a" : "0x4d0", "s" : "0x2" }
        ],
        "MATH" :
        [
            { "a" : "0xf0", "s" : "0x1" }
        ],
        "LDRC" :
        [
            { "a" : "0x2e", "s" : "0x2" },
            { "a" : "0x4e", "s" : "0x2" },
            { "a" : "0x61", "s" : "0x1" },
            { "a" : "0x63", "s" : "0x1" },
            { "a" : "0x65", "s" : "0x1" },
            { "a" : "0x67", "s" : "0x1" },
            { "a" : "0x80", "s" : "0x1" },
            { "a" : "0x92", "s" : "0x1" },
            { "a" : "0xb2", "s" : "0x2" },
            { "a" : "0x1000", "s" : "0x10" },
            { "a" : "0x400", "s" : "0x80" },
            { "a" : "0x800", "s" : "0x80" }
        ],
        "RTC" :
        [
            { "a" : "0x70", "s" : "0x8" }
        ],
        "TIMR" :
        [
            { "a" : "0x40", "s" : "0x4" },
            { "a" : "0x50", "s" : "0x4" }
        ],
        "SMC" :
        [
            { "a" : "0x300", "s" : "0x20" },
            { "a" : "0xfef00000", "s" : "0x10000" }
        ],
        "EC" :
        [
            { "a" : "0x62", "s" : "0x1" },
            { "a" : "0x66", "s" : "0x1" }
        ]
    }
}