L1 cache understanding..

Hi,

I am hoping to do some "cache friendly" programming (c++) on my

MacBook Air El Capitain,

Processor 1.6Gz Intel Core 15 duo

When I open the details I see no L1 cache info;

Model Name: MacBook Air

Model Identifier: MacBookAir7,2

Processor Name: Intel Core i5

Processor Speed: 1.6 GHz

Number of Processors: 1

Total Number of Cores: 2

L2 Cache (per Core): 256 KB

L3 Cache: 3 MB

Memory: 8 GB

Boot ROM Version: MBA71.0166.B12

SMC Version (system): 2.27f2

Serial Number (system): C1MRLBH0H3QF

Hardware UUID: 43DA2510-3634-541B-914D-A1A53EB0BD77

which is correlated by;

sysctl -n machdep.cpu.brand_string

Intel(R) Core(TM) i5-5250U CPU @ 1.60GHz

At the command line however I see a discrepency (see the first output, L1 cache == 32K)

sysctl -a | grep -i l1

hw.l1icachesize: 32768

hw.l1dcachesize: 32768

machdep.cpu.tlb.data.small_level1: 64

grahams-MacBook-Air:~ grahamwalsh$ sysctl -a | grep -i l2

hw.l2cachesize: 262144

machdep.cpu.cache.L2_associativity: 8

grahams-MacBook-Air:~ grahamwalsh$ sysctl -a | grep -i l3

hw.l3cachesize: 3145728

I read elsewhere that there is no L1 cache on intel I5 Core processors, is that correct? If yes, is there any docs somebody can suggest I read that will enable me to exploit the CPU caching (for my own interest/learning, I would like to do some cache "unfriendly" tests, benchmark, recode "cache friendly" and benchmark again".

Another thread mentions;

"Yes, it's the same. Intel hasn't been using L1 caches in their newer processors in order to put more transistors on the die, and rely more on the L2 and L3 caches. That's what I have read"

If thats the case, is this approach the way forward? Or is it just something that happened for this particular processor and the best architecture is that which does have L1 cache?

As you can see, Im just trying to get my head around this stuff. By no means expert on the subject (yet!! 🙂 🙂 )

cheers

Graham